# Display selection E05 — public documentation audit

Checked 2026-10-07. Requirement: rectangular 2.8–3.1 inch capacitive touch, complete public electrical/mechanical documentation, low-volume purchasing; enclosure may grow. This research changes no electrical files.

## Selected E05 display — selection complete

**Newhaven NHD-2.8-240320AF-CSXP-FCTP**, order **TFT Rev1B and CTP Rev2B / FT5426G**. Selection is fixed for E05; the old undocumented MIPI-panel hold is superseded. Product page says in stock, $29.33 single unit, plus shipping/taxes. 2.8-inch IPS, 240×320 portrait (320×240 landscape), SPI or 8080-II. This is not a MIPI display and is not 800×480. Rotation is implemented in ST7789VI MADCTL and matching touch-coordinate transform.

Primary sources downloaded in `research/E05/display/`:

- [Product and purchase](https://newhavendisplay.com/2-8-inch-ips-capacitive-tft-display/)
- [Complete module specification, revision 9, 2026-09-01](https://newhavendisplay.com/content/specs/NHD-2.8-240320AF-CSXP-FCTP.pdf), saved `NHD-2.8-240320AF-CSXP-FCTP.pdf`; printed pp.3 mechanical,4 pinout,6 electrical,8–9 touch registers,10–15 timing,17–18 initialization.
- [Official transition guide](https://newhavendisplay.com/content/docs/NHD-2.8-240320AF-CSXP-F_TransitionGuide.pdf), saved same filename. Essential: old Rev1A cannot be substituted; Rev1B adds SPI and alters pins 6,9,32,33,40.
- [ST7789VI controller PDF](https://support.newhavendisplay.com/hc/en-us/article_attachments/28274702816407), saved `ST7789VI.pdf`, 317 pages.
- [FT5426G controller PDF](https://support.newhavendisplay.com/hc/en-us/article_attachments/18307582846103), saved `FT5426G.pdf`, 19 pages.
- [Manufacturer TFT example](https://github.com/NewhavenDisplay/NHD-2.8-240320AF-CSXP-F_Example), 8-bit parallel example; bus-write routines must be adapted for SPI.
- [Manufacturer touch driver](https://github.com/NewhavenDisplay/FT5X26-Focaltech-Drivers).

### Geometry and connector contract

Latest drawing overrides the product-page 4.99 mm depth: overall **50.00±0.20 × 69.20±0.20 × 4.97±0.30 mm**. Complete built-in touch/cover is included, do not add a second glass mechanically. Active area43.20×57.60 mm, offset3.40 mm from left and3.05 mm from top in portrait drawing; visible area44.20×58.60 mm, offsets2.90/2.55. Thus the native inactive border is asymmetric, especially at the tail edge; cannot represent this as bezel-free active glass.

TFT tail40 contacts,0.50 mm pitch,20.50±0.20 mm width,0.30±0.03 mm insertion thickness; tail extends30.0±0.5 mm from bottom; stiffener/contact orientation shown on printedp.3. CTP tail6contacts,1.0 mm pitch,7.00±0.20 mm width,0.30±0.03 mm thickness, extends55.50±0.50 mm from bottom. Both tails must fold into internal space with no crease at the glass bond; precise fold routing is a mechanical design task, not answered by nominal face dimensions.

Recommended mates, independently checked on Molex primary catalog:

- TFT **54132-4062 / 0541324062**,40contacts,0.5 mm,bottom-contact,right-angleSMT,2.0 mm matedheight,0.5 A/contact. https://www.molex.com/en-us/products/part-detail/541324062
- CTP **52271-0679 / 0522710679**,6contacts,1.0 mm,bottom-contact,right-angleSMT,3.0 mm matedheight,0.5 A/contact. https://www.molex.com/en-us/products/part-detail/522710679

Do not mirror contact numbering from front-side glass view. Connector land pattern and insertion-side orientation must be checked against its drawing during PCB creation; a generic40-pin symbol is insufficient.

### Complete pinout for 4-wire SPI option

| TFT pin | Panel name | Connection |
|---|---|---|
|1,39|GND|Ground|
|2–5|NC|Unconnected|
|6|SDO|MCU MISO, optional readback|
|7|VDD|LCD analog supply2.4–3.6 V|
|8|VDDI|I/O supply1.65–3.3 V|
|9|SDA|SPI MOSI|
|10|CSX|SPI chip select active low|
|11|DCX|**SPI SCLK**, not data/command in serial mode|
|12|WRX|**SPI data/command**, low command/high data|
|13|RDX|Unused serial input; define inactive level per controller|
|14–29|DB0…DB15|Unused parallel data inputs; fix to defined logic level as recommended by controller|
|30|/RES|MCU active-low reset|
|31|IM0|GND|
|32|IM1|VDDI directly (internal10k pull-down)|
|33|IM2|VDDI directly (internal10k pull-down)|
|34–37|LED-K1…K4|Four cathode groups to current sinks|
|38|LED-A|Backlight anode|
|40|TE|MCU interrupt optional; leave output open if unused|

Controller IM3 is already set on the module for interfaceII. Confirmed SPI mode straps from transition guide: IM0=0,IM1=1,IM2=1. Controller §8.4 maps WRX→data/command,DCX→clock. Typical Arduino ST7789 “DC” naming must not cause a swapped connection.

| CTP pin | Signal |
|---|---|
|1|VDD2.7–3.6 V|
|2|GND|
|3|SCL with pull-up|
|4|SDA with pull-up|
|5|/INT to MCU|
|6|/RESET separately controlled; not tied to VCC|

### Power, timing and firmware requirements

LCD current8 mA typical/15 mA max; CTP13 mA typical/22 mA max active,100µA maxsleep. LED current160mA nominal at2.8–3.4V (3.1Vtyp). Four cathode groups; drawing shows two parallelLEDs pergroup. Use controlledcurrent, never voltage-only feed. Transition guide explicitly permits100mA total on Rev1B. Lower brightness/battery profile should reduce current further or use PWM after bench characterization. The160mA full-brightness load is incompatible with treating a125mAh cell as an arbitrary high-current source.

VDDI operating max3.3V means a nominal3.3V rail with positive tolerance must be reviewed. A3.0V shared MCU/displayI/O domain offers margin; if MCU remains3.3V, level-compatibility/tolerances need explicit analysis. TFT VDD can be3.0 or3.3V within tolerance. Touch requires≥2.7V and logic thresholds refer to its actualVDD.

The final design follows the stricter assembled-module timing: SPI write ≤15 MHz and read ≤6 MHz, starting at 1 MHz mode 0. The controller-only 16 ns write / 150 ns read limits do not override the module specification or validate this PCB. TE can synchronize updates. Full-frame RGB565 payload is 153600 bytes; 15 MHz takes 81.92 ms before overhead, so partial UI updates are appropriate. Faster clocks are not qualified for this design.

Touch address7-bit0x38 (datasheet example writes0x70,reads0x71);I²C≤400kHz. Power rise≤5ms, resetlow≥1ms, waitup to200ms after reset before reports. Use module registerspp.8–9 and manufacturerFT5X26 driver, retain pin/state control for recovery.

Initialization sequence and gamma are publicly specified in modulepp.17–18. Must adapt example bus primitives, add proper display-on/MemoryWrite when rendering, selectRGB565 COLMOD0x55 if using16-bitpixels instead of example0x66, and wait at least controller-specified sleep-exit delay. Originalexample covers initialization but is not turnkeySTM32U5 firmware. Rotation uses MADCTL (MV/MX/MY), newcolumn/page bounds and touchmapping; do not justrotatea3Dtexture.

## Other candidates checked

- **EastRising ER-TFT028A2-4 IPS240×320**: exact downloadablePDF exists in indexedprimarysearch and storefront is referenced, but manufacturer currently returns403 to directPDF and productreads from this environment. Could not verify completecurrenttouchassembly stack/pinout/code locally; do not freezehardwareonunreadPDF. https://www.buydisplay.com/download/manual/ER-TFT028A2-4_Datasheet.pdf ; https://www.buydisplay.com/2-8-inch-240x320-ips-tft-lcd-display-panel-optional-touch-panel-wide-view
- ER-TFT028A3-4 / ER-TFT028-4 are TN/12o’clock families, inferiorforrotatingviewangle.
- EastRisingER-TFT028-2 is2.8-inchMIPI480×480 **round**, nottheintendedrectangularmonoblock.
- **FocusLCD E30RB-I-MW320-C**, 3.0-inch MIPI, was independently checked by the root agent. Not selected: conflicting controller references and missing verified initialization would reintroduce a documentation hold.

## Connector land-pattern evidence and MCU cross-check

Both connector PDFs are archived locally; their author is Molex. The mirror was used only to retrieve the original drawings after direct CDN downloads timed out.

- LCD `Molex_541324062_sd.pdf`: **SD-54132-064 Rev G, 2018-03-14**, exact 54132-4062 row, mechanical drawing page 1, recommended land pattern page 2. [Official drawing](https://www.molex.com/content/dam/molex/molex-dot-com/products/automated/en-us/salesdrawingpdf/541/54132/541324062_sd.pdf); [downloaded mirror](https://www.ic-components.com/files/0b/0541324062.pdf). Signal pads **0.30 × 1.20 mm**, pitch **0.50 mm**. Retention pads are stepped polygons, not generic rectangles; reproduce page 2 including its inner-edge copper/solder keepout.
- CTP `Molex_522710679_sd.pdf`: **SD-52271-036 Rev F, 2021-08-03**, exact 52271-0679 row. [Downloaded Molex-authored drawing](https://www.ic-components.com/files/9d/0522710679.pdf). Signal pads **0.60 × 1.90 mm**, pitch **1.00 mm**, retention pads **2.10 × 2.80 mm**. For signal centers x = −2.5…2.5 mm, y = 0, with +y into the connector, retention centers are **x = ±5.65 mm, y = 2.35 mm**. The closed connector front is approximately y = 6.75 mm; the open actuator reaches approximately y = 8.50 mm. Keep assembly access free beyond the closed-component courtyard. Body height is **3.0 ± 0.2 mm**.

Inspection renders are saved as `Molex_541324062_mechanical.png`, `Molex_541324062_landpattern.png`, `Molex_522710679_mechanical.png`, `Molex_522710679_landpattern.png`; the CTP detail crops resolve pad-edge ambiguities. Generic library footprints must not replace these without a dimensional comparison.

STM32U5G9 current [DS14102 Rev5](https://www.st.com.cn/resource/en/datasheet/stm32u5g9zj.pdf) was read through the web tool: printed page 133 confirms **PB13 = SPI2_SCK, PB14 = SPI2_MISO, PB15 = SPI2_MOSI, all AF5**. Printed page 34 requires **VDDDSI connected to VDD** and **VDD11DSI connected to VDD11**, including when DSI is not used. The full offline reference `STM32U5Gxxx_DS14102_Rev2.pdf` came from the [official ST Japanese mirror](https://www.stmcu.jp/wp/wp-content/uploads/2024/01/DS14102_Rev2.pdf); it is explicitly an older revision, not mislabeled as Rev5.

`display/newhaven-mechanics.json` contains the landscape transform, the true asymmetric active-area offset, unfolded FPC coordinates and stack allowance. No guaranteed minimum flex bend radius was found; the JSON records this as `null`, requiring sample qualification rather than an invented guarantee.

This is component qualification by documentary evidence. It does not replace sample inspection, FPC fit, power-up, LCD/CTPfirmware, EMC or assembled-board tests.